In a sudden but perhaps not too surprising announcement, Micron has stated that they are ceasing all R&D of 3D XPoint memory technology. Intel and Micron co-developed 3D XPoint memory, revealed in 2015 as a non-volatile memory technology with higher performance and endurance than NAND flash memory.

Intel has been responsible for almost all of the commercial volume of 3D XPoint-based products, under their Optane brand for both NVMe SSDs and persistent memory modules in the DIMM form factor. Micron in 2016 announced their QuantX brand for 3D XPoint products, but never shipped anything under that brand. Their first and only real product based on 3D XPoint was the X100 high-end enterprise SSD which saw very limited release to close partners. Micron has now decided that further work to commercialize 3D XPoint memory isn’t worth the investment.

Micron currently owns the only fab equipped to mass-produce 3D XPoint memory: the Lehi, Utah fab that was formerly the home of the Intel-Micron flash and 3D XPoint joint venture IMFT. Intel and Micron began splitting up their partnership in 2018, first parting ways for 3D NAND flash memory development, followed by dissolving the 3D XPoint partnership after completing development on the second generation 3D XPoint. In 2019, Micron exercised their rights to buy out Intel’s share of the IMFT fab, leaving Micron as the sole owner of the fab and Intel in the position of buying 3D XPoint wafers from Micron to use in Optane products. Intel’s Optane products have not been enough to fully utilize the capacity of that fab, and Micron’s non-GAAP operating profits have been taking a hit of over $400 million per year in underutilization charges.

Micron is now putting that 3D XPoint fab up for sale, and is currently engaged in discussions with several potential buyers. Intel is the most obvious potential buyer, having recently begun the long process of selling their NAND flash and flash-based SSD business to SK hynix while keeping their Optane products. Intel has already moved their 3D XPoint R&D to Rio Rancho, NM but has not built up any 3D XPoint mass production capacity of their own; buying the Lehi, UT fab would save them the trouble of equipping eg. their NAND fab in Dalian, China to also manufacture 3D XPoint.

However, Intel is not guaranteed to be the buyer of the Lehi, UT fab. They’ve doubtless had opportunities to do so before as Intel and Micron unwound their partnership. Micron states that the Lehi, UT fab could be used to produce analog or logic ICs, not just memory—and that converting it to large-scale manufacturing of DRAM or NAND flash memory would not be as appealing to Micron as simply expanding capacity at their other existing fabs. With widespread semiconductor shortages affecting almost all corners of the industry, this fab is likely to sell quickly even if the buyer needs to put substantial effort into retooling.

Micron does not have a direct replacement lined up for 3D XPoint memory technology, but continues R&D into new memory and storage technologies. Micron’s announcement is emphasizing a pivot toward developing memory products that will use the Compute Express Link (CXL) interface, which promises to be a vendor-neutral interface for DRAM and non-volatile memories such as 3D XPoint.

Related Reading:

• Intel Announces New Wave of Optane and 3D NAND SSDs
• Intel & Micron Sign New 3D XPoint Wafer Supply Agreement
• SK Hynix to Buy Intel’s NAND Memory Business For $9 Billion
• Compute eXpress Link 2.0 (CXL 2.0) Finalized: Switching, PMEM, Security

Source: AnandTech – Micron Abandons 3D XPoint Memory Technology

In an effort to partially mitigate the market chaos that has come from the cryptocurrency mining boom over the last 6 months, last month NVIDIA very publicly introduced a mining throttling mechanism for its then-new GeForce RTX 3060 cards. By throttling the performance of Ethereum mining on these cards to half their native rate, it would ideally keep miners from immediately snapping up any (and every) RTX 3060 card in search for a profit, leaving more available for NVIDIA’s gaming customers. Essentially a software security/DRM system, the success of NVIDIA’s effort would hinge largely on ensuring the underlying throttling mechanism remain undefeated – an effort that has significantly fumbled after NVIDIA accidentally released a driver without the complete throttling code.

As part of the development of their upcoming Release 470 driver branch, last week NVIDIA released driver 470.05 to developers and Windows Insiders. Among other things, this development driver enabled CUDA support on the Windows Subsystem for Linux 2 (WSL2) for the first time. Unfortunately, this driver didn’t include the complete throttling code for Ethereum, and as a result it’s possible to use the driver to mine the cryptocoin on RTX 3060 cards at their full (native) rate.

The news was initially broken by HardwareLuxx and ComputerBase, who had the driver and were able to confirm that they were no longer getting throttled with the new driver. NVIDIA in turn has since confirmed the matter as well, sending a statement out to various members of the press that “A developer driver inadvertently included code used for internal development which removes the hash rate limiter on RTX 3060 in some configurations. The driver has been removed.”

Unfortunately, this is a prime, real-world example of how software security (and DRM-like systems) are only as strong as their weakest link – in this case NVIDIA’s driver team. NVIDIA security mechanisms rely on signature checks for the BIOS and drivers to prevent bypassing the throttling mechanism, but since this is a signed, legitimate NVIDIA driver to begin with, it is readily accepted by the card. And since the driver doesn’t have a timebomb on it, the genie is out of the bottle, as it were. Windows cryptominers should be able to use the driver with RTX 3060 cards indefinitely, and since the driver was widely released there’s no possibility to preventing its re-distribution.

The silver(ish) lining to this otherwise bad news is that it could have been even worse for NVIDIA. This driver was for Windows and not for Linux, with the latter being the preferred platform for industrial miners. Furthermore there are apparently other mining-checks in the driver that do still work (e.g. checking the PCIe link width), so NVIDIA’s anti-Ethereum throttle for the RTX 3060 is not completely broken. It has, however, had a massive chunk taken out of it with this driver release.

All of which means that the ongoing chip crunch has just become all that more severe for gamers and other video card buyers. With an unthrottled RTX 3060 able to pull in around $5/day in profit, the card risks being a reasonably attractive offering for miners looking to make a quick buck.

Source: AnandTech – NVIDIA Fumbles, Releases GeForce RTX 3060 Driver Without Anti-Mining Throttle

Alongside every launch of AMD’s consumer processors, the commercial offerings for business come along a few months after. Today we see the commercial launch of the Ryzen 5000 Mobile series, named Ryzen Pro 5000 Mobile. These are built on the same Cezanne processor design, but with the added sprinkling of Pro level features required by commercial customers for widescale deployment, security, and stability. Alongside the increased performance from the previous generation, these new parts include the security updates in Zen 3 such as Shadow Stacks, Pro-level features such as DASH, and guaranteed silicon and imaging support.

Source: AnandTech – AMD Ryzen Pro 5000 Mobile: Zen 3 comes to Commercial Notebooks

Today Qualcomm is announcing that the company has completed the acquisition of NUVIA, a start-up company consisting of industry veterans who were behind the creation of Apple’s high-performance CPU cores, and who were aiming to disrupt the server market with a new high-performance core called “Phoenix”.

Source: AnandTech – Qualcomm Completes Acquisition of NUVIA: Immediate focus on Laptops

Back in December, we reported that Intel’s Maple Ridge Thunderbolt 4 controller was shipping to customers. We can now report that ASUS has unveiled a Thunderbolt 4 expansion card, the ASUS ThunderboltEX 4. It includes support for 100 W quick charging, includes a 40 Gbps bi-directional switch, and can support up to 8K ultra HD resolutions.

Since the launch of Intel’s Z590 chipset on socket LGA1200, we’ve seen some of the more premium models featuring Intel’s latest Maple Ridge Thunderbolt 4 controllers. This is primarily a feature we see on models looking to add functionality for content creators. Native Thunderbolt 4 is built into Intel Tiger Lake. Still, for motherboards without Thunderbolt capabilities, the ASUS ThunderboltEX 4 add-on card allows users to add Intel’s latest Maple Ridge controller into existing systems.

ASUS hasn’t unveiled a full list of technical specifications at the time of writing. Still, we cross-referenced the specifications we do know with Intel’s JHL8540 Maple Ridge TB4 controller, and they match. The accessories include everything needed to get the ThunderboltEX 4 operational, which means users will require a PCIe 3.0 x4 (or PCIe 4.0 x2) and USB 2.0 motherboard header available, as well as a 6-pin PCIe 12 V ATX power cable free from the power supply. 

Adding not just one port but a total of four, the ASUS ThunderboltEX 4 includes two Type-C and two mini-DisplayPort inputs, which allow for up to five devices to be daisy-chained. This includes up to three devices and two Thunderbolt monitors, or four devices and one monitor. The top Type-C port includes support for 100 Watt quick charging and can even power a compatible notebook, with the second Type-C port offering up to 27 Watts of quick charging capability. We should also note that the ThunderboltEX 4 can accommodate monitors with resolutions up to 8K due to conforming to DisplayPort 1.4. 

At the time of writing, ASUS hasn’t specified when the ThunderboltEX 4 expansion card will be available, nor how much it will cost.

Gallery: ASUS Reveals ThunderboltEX 4 Expansion Card, Dual Type-C

Source: ASUS

Related Reading

• First AMD B550 With Thunderbolt 4: The ASUS ProArt B550-Creator
• Lenovo Introduces The ThinkVision P40w: 40-inch Thunderbolt 4 Display With Intel AMT
• Intel’s Maple Ridge (JHL8540) Thunderbolt 4 Controller Now Shipping
• New Second Gen EVE V 2-in-1: Tiger Lake 3840×2400 with Thunderbolt 4
• Intel Thunderbolt 4 Update: Controllers and Tiger Lake in 2020

Source: AnandTech – ASUS Reveals ThunderboltEX 4 Expansion Card, Dual Type-C & Mini-DP

The coronavirus pandemic left no industry unscathed. But retail in particular bears many scars, and many permanent changes. But are things really as bad as we think?

Source: AnandTech – Sponsored Post: What COVID-19 Means for the Future of Retail

Seagate recently published its long-term technology roadmap revealing plans to produce ~50 TB hard drives by 2026 and 120+ TB HDDs after 2030. In the coming years, Seagate is set to leverage usage of heat-assisted magnetic recording (HAMR), adopt bit patterned media (BPM) in the long term, and to expand usage of multi-actuator technology (MAT) for high-capacity drives. This is all within the 3.5-inch form factor.

“We can use our recent experience, productizing our 20 TB HAMR drive to translate from laboratory demonstrations to products, which puts us on track to deliver 50 terabytes by 2026,” said John Morris, Chief Technology Officer of Seagate. “We have drive technologies planned which will enable long term HAMR growth and a path to over 100 TB devices. And hard disk drives will continue to service the needs of mass capacity storage with the most optimal, total cost of ownership for the next decade and beyond.”

HAMR to Enable 90 TB HDDs

In the recent years HDD capacity has been increasing rather slowly as perpendicular magnetic recording (PMR),  even boosted with two-dimensional magnetic recording (TDMR), is reaching its limits. Seagate’s current top-of-the-range HDD features a 20 TB capacity and is based on HAMR, which not only promises to enable 3.5-inch hard drives with a ~90 TB capacity in the long term, but also to allow Seagate to increase capacities of its products faster.

In particular, Seagate expects 30+ TB HDDs to arrive in calendar 2023, then 40+ TB drives in 2024 ~ 2025, and then 50+ TB HDDs sometimes in 2026. This was revealed at its recent Virtual Analyst Event. In 2030, the manufacturer intends to release a 100 TB HDD, with 120 TB units following on later next decade. To hit these higher capacities, Seagate is looking to adopt new types of media.

“As we approach the maximum useful capacity of PMR technology, each successive drive increases by 1TB or 2TB at a time,” said Jeff Fochtman, Seagate’s SVP of Business and Marketing at the company’s Analyst Meeting. “With HAMR technology, it allows us to jump in steps of 4 terabytes, 6 terabytes, or even 10 terabytes at a time.”

Today’s 20 TB HAMR HDD uses nine 2.22-TB platters featuring an areal density of around 1.3 Tb/inch². To build a nine-platter 40 TB hard drive, the company needs HAMR media featuring an areal density of approximately 2.6 Tb Tb/inch². Back in 2018~2019 the company already achieved a 2.381 Tb/inch² areal density in spinstand testing in its lab and recently it actually managed to hit 2.6 Tb/inch² in the lab, so the company knows how to build media for 40 TB HDDs. However to build a complete product, it will still need to develop the suitable head, drive controller, and other electronics for its 40 TB drive, which will take several years.

Bit Patterned Media (BPM) to enable HDDs up to 120 TB

In general, Seagate projects HAMR technology to continue scaling for years to come without cardinal changes. The company expects HAMR and nanogranular media based on glass substrates and featuring iron platinum alloy (FePt) magnetic films to scale to 4 ~ 6 Tb/inch² in areal density. This should enable hard drives of up to 90 TB in capacity.

In a bid to hit something like 105 TB, Seagate expects to use ordered-granular media with 5 ~ 7 Tb/inch² areal density. Yo go further, the world’s largest HDD manufacturer plans to use ‘fully’ bit patterned media (BPM) with an 8 Tb/inch² areal density or higher. All new types of media will still require some sort of assisted magnetic recording, so HAMR will stay with us in one form or another for years to come.

“We see an opportunity to scale this design space with granular media into the range of 4 Tb/inch² to 6 Tb/inch², at which point we plan to add patterning in one dimension through the use of ordered grain media,” said Morris. “This, we expect to be a steppingstone in media to open up the range of 5 Tb/inch² to 7 Tb/inch². Then we will transition to fully patterned media to open up densities to 8 Tb/inch² and even higher. With the areal density CAGR just introduced, we have a path to 10TB per disk by 2030. This then represents our outlook for technology limits over the next 10 to 15 years.”

Performance Improvements Included

Increasing the capacity of hard drives is extremely important to keep them competitive with solid-state drives, but in a bid to stay relevant for operators of cloud datacenters, HDDs also need to improve sequential and random performance.

Sequential performance of hard drives surges along with areal density, so we see gradual HDD performance bumps every year. But as the capacity of a drive increase, the random IOPS-per-TB performance drops, which requires operators of large datacenters to mitigate this with caches to maintain their Quality-of-Service, which means additional costs.

Seagate and Western Digital have been looking to radically increase sequential and random performance of HDDs by installing more than one actuator, with multiple read/write heads into one drive. Seagate’s Mach.2 technology — which embraces two actuators — can almost double IOPS-per-TB performance of a hard drive and substantially increase its sequential read/write speeds. Furthermore, with two independent actuators, Seagate can almost halve the time it needs to test one drive before shipping, which reduces its manufacturing costs. The advantage of two actuators will become even more significant as HDD makers transit to platforms with more platters.

“A notable benefit to dual actuator technology standardization is that it drastically cuts down test time, and therefore, hard drive production time is greatly reduced,” said Fochtman. “This is a benefit we’re looking forward to recognizing on the cost side of the business.”

There are about a dozen of customers that already use Seagate’s Mach.2 PMR-based HDDs in their datacenters, although these drives do not have a commercial branding. Eventually, the company plans to make Mach.2 HDDs available to other clients, yet the company does not disclose when this is set to happen. However, the manufacturer is poised to use its Mach.2 technology more broadly once its drives hit capacities of above 30 TB, as drives with one actuator will not have sufficient performance, and a one-actuator design would increase the total cost of ownership.

“Although Mach.2 is ramped and being used now, it is also really still in a technology-staging mode,” said Fochtman. “When we reach capacity points above 30 terabytes, it will become a standard feature in many large data center environments.”

HDD TCO to Remain Low

Speaking of TCO, Seagate is confident that hard drives will remain cost-effective storage devices for many years to come. Seagate believes that 3D NAND will not beat HDDs in terms of per-GB cost any time soon and TCO of hard drives will remain at competitive levels. Right now, 90% of data stored by cloud datacenters is stored on HDDs and Seagate expects this to continue.

“We believe that the TCO for hard disk drives and SSDs will stay approximately in equilibrium,” said Morris. “Both SSDs and hard disk drives will continue to improve their value proposition, and storage demand for both will continue to grow. They are both critical enabling technologies for the growing datasphere, and their synergistic relationship in the data center infrastructure will persist.”

Related Reading

• Toshiba Unveils World’s First FC-MAMR HDD: 18 TB, Helium Filled
• Western Digital Expands 18TB Purple Surveillance Storage
• Toshiba to Expand HDD Production: 20 TB & 10-Platter Drives Coming
• Demand for HDD Storage Booming: 240 EB Shipped in Q3 2019
• Seagate: 18 TB HDD Due in First Half 2020, 20 TB Drive to Ship in Late 2020
• Western Digital 20 TB HDD: Crazy Capacity for Cold Storage
• Toshiba’s HDD Tech Roadmap: A Mix of SMR, MAMR, TDMR, and HAMR

Source: AnandTech – Seagate’s Roadmap: The Path to 120 TB Hard Drives

We’re gearing up for a busy time when it comes to server announcements, with the recent news that AMD will be launching its next generation platform on March 15^th, but also we are expecting Intel to disclose its Ice Lake Xeon Scalable platform sometime soon as well. To that point, a discussion I had with Intel today, on-the-record, disclosed some interesting numbers about the state of Ice Lake Xeon Scalable deployment.

Source: AnandTech – Intel Ice Lake Xeon Scalable Shipments To Date: 30 Customers, 100k+ Units

When considering data privacy and protections, there is no data more important than personal data, whether that’s medical, financial, or even social. The discussions around access to our data, or even our metadata, becomes about who knows what, and if my personal data is safe. Today’s announcement between Intel, Microsoft, and DARPA, is a program designed around keeping information safe and encrypted, but still using that data to build better models or provide better statistical analysis without disclosing the actual data. It’s called Fully Homomorphic Encryption, but it is so computationally intense that the concept almost useless in practice. This program between the three companies is a driver to provide IP and silicon to accelerate the compute, enabling a more secure environment for collaborative data analysis.

Source: AnandTech – Intel to Build Silicon for Fully Homomorphic Encryption: This is Important

We’ve known for a while that AMD was set to launch its next generation enterprise EPYC processor family, collectively known by its codename Milan, sometime in the first quarter of this year. Today AMD has put out a press release confirming the date and time of its online event – the launch of the new 7003 series processors will occur starting at 8am PT/11am ET on March 15, 2021.

The launch event will feature presentations from CEO Dr. Lisa Su, CTO Mark Papermaster, GM Enterprise and Embedded Solutions (EESC) Forrest Norrod, and GM Server Business Unit Dan McNamara. Leading data center partners and customers will also make an appearance.

To date we know that AMD’s Milan processor line will feature up to 64 Zen 3 cores, using a seemless transition from the Zen 2 EPYC Rome ecosystem with pin-compatible processors. Milan will also offer up to 128 PCIe lanes, eight channel memory, and dual socket configurations. If the desktop Zen 3-based processors are any measure, +19% IPC generational gains are expected with the new processor, despite main memory access likely remaining the same. We have questions on exact performance, frequencies and efficiency, but this launch date should showcase all the product specifications such that we will see where the solution sits compared to current market offerings.

AMD has provided some previous benchmarking numbers – at CES the company showcased weather prediction simulation code, with two new 32-core Milan processors up against two of Intel’s popular 28-core Xeon Gold 6258R units. In that first party demo, a six hour simulation showed that Milan was 46% faster in dual socket compute. Later we were shown a single socket comparison, where the difference rose to 68%. These were first party tests without any comparison system details, however we expect more data on the March 15^th launch.

Questions will be asked about AMD’s ability to supply EPYC, given it currently has a squeeze on its supply chain for a number of products. We are aware that AMD has already been providing key customers with complete silicon, and also to add to this, Dr. Lisa Su has stated that one of AMD’s key targets for 2021 is going to be the enterprise market.

We will be live blogging AMD’s launch – it can also be found online at the AMD events website.

Related Reading

• AMD CEO Dr. Lisa Su: Interview on 2021 Demand, Supply, Tariffs, Xilinx, and EPYC
• AMD Previews 3rd Gen EPYC ‘Milan’ Performance
• AMD EPYC Rome in (Deep) Mini-ITX? ASRock Rack’s New ROMED4ID-2T
• Google’s new Confidential Virtual Machines on 2nd Gen AMD EPYC

Gallery: AMD to Launch 3rd Generation EPYC on March 15th: Milan with Zen 3

Source: AnandTech – AMD to Launch 3rd Generation EPYC on March 15th: Milan with Zen 3

Everyone wants to know what’s in Intel’s new Ice Lake Xeon server platform, right? Well the first promited board has been disclosed: Axiomtek (who?) has unveiled its latest motherboard compatible with Intel’s Xeon Scalable Ice Lake processors based on the LGA4189 socket. The Axiomtek IMB700 is an ATX-sized solution with six memory slots capable of supporting up to 384 GB in hex-channel, with two Gigabit Ethernet ports six SATA-600 storage slots.

During the virtual Hot Chips 2020 industry event show, during our live blog of Intel’s segment, Intel unveiled some details about its upcoming Ice Lake Xeon Scalable processors. Based on Intel’s 10nm+ manufacturing process, we confirmed that Intel had started production on its Ice Lake-SP chips at the beginning of the year. With not much furor surrounding expected motherboard models at the moment, Axiomtek has unveiled its IMB700 with a single LGA4189 socket based on Intel’s C621A chipset. Note that this is the same family of chipsets as current Skylake and Cascade Lake Xeons.

The Axiomtek IMB700 features an ATX PCB with a very simplistic green PCB which is common on professional and industrial-grade motherboards. Some of its key features include a single LGA4189 transposed socket, with six memory slots that can accommodate both LRDIMM and RDIMM DDR4-3200 memory, with a total capacity of up to 384 GB. For storage, the IMB700 features a single PCIe 3.0 x4 M.2 2280 slot and six SATA-600 ports, including support for RAID 0, 1, 5, and 10 arrays.

Located in the center of the board are three full-length PCIe slots, with the top two operating at PCIe 4.0 x16, with the other operating at either PCIe 3.0 x16 or x8. There’s also three half-length PCIe 3.0 x8 slots, although one of the half-length slots shares bandwidth with the blue-colored full-length slot. 

On the rear panel is a basic array of input and outputs, including four USB 3.1 G1 Type-A ports, one D-Sub video output, a PS/2 keyboard, and mouse combo port, as well as an RS-232/422/485 port, and dual Intel i210-AT Gigabit Ethernet. In regards to audio, Axiomtek offers its AX93242 HD audio converter board as an additional extra.

At present, Axiomtek hasn’t unveiled any pricing information, but the official product page does state the IMB700 is coming soon. We’re waiting for Intel to fully disclose its Ice Lake Xeon platform.

Source: Axiomtek

Related Reading

• Intel Confirms 10nm Ice Lake Xeon Production Has Started.
• Intel at CES 2021: Overview
• Intel Ice Lake Xeon in Production
• Hot Chips 2020 Live Blog: Next-Gen Intel Xeon, Ice Lake-SP (9:30am PT)

Source: AnandTech – Axiomtek Unveils IMB700 Motherboard, LGA4189 For Intel Ice Lake-SP

Today Qualcomm is announcing the new “Snapdragon Sound” branding initiative, essentially an umbrella term that covers the company’s various audio related hardware and software products, promising improved end-to-end interoperability for a better audio experience.

Source: AnandTech – Qualcomm Announces “Snapdragon Sound” Initiative