WikiChip has published a detailed overview of Intel’s 10nm process, which includes the latest insight from IEDM and ISSCC. The major changes include a 2.7x density increase from 14nm, 3rd-generation FinFET transistors, and the adoption of cobalt interconnects, which allows for reduction in line resistance.



The monumental engineering feat Intel has presented at IEDM 2017 can only be described as a highly advanced 7nm-class manufacturing technology. Interestingly, if they ramp-up by around mid-year, they will still manage to squeak by and maintain 7x density in roughly 7 years in their relentless pursuit to keep Moore’s Law going.

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Source: [H]ardOCP – Intel’s 10-Nanometer Process Technology Detailed