Rambus claims to be the first to have working silicon in its labs for DDR5, the next major interface for DRAM dual in-line memory modules (DIMMs): DDR5 is expected to support data rates up to 6.4 Gbits/second delivering 51.2 GBytes/s max, up from 3.2 Gbits and 25.6 GBytes/s for today’s DDR4. The new version will push the 64-bit link down to 1.1V and burst lengths to 16 bits from 1.2V and 8 bits. In addition, DDR5 lets voltage regulators ride on the memory card rather than the motherboard.



…CPU vendors are expected to expand the number of DDR channels on their processors from 12 to 16. That could drive main memory sizes to 128 Gbytes from 64 GB today. DDR5 is expected to first appear on high performance systems running large databases or memory-hungry applications such as machine learning. While some servers may lag adopting DDR5 for six months or so, “it’s just a couple quarters, not a couple years…Everyone wants a fatter memory pipe,” said Dhulla.

Discussion

Source: [H]ardOCP – DDR5 Runs in Rambus’ Labs