The semiconductor industry is beyond remarkable when it comes to the the complexity and precision of the processes. A modern integrated circuit is not a single layer of circuitry, but many layers, all stacked on top of each other. This is all done through photolithography, where a pattern is imaged on a silicon wafer. Each layer requires a separate image, and all the images have to be aligned. If you take the 14nm number seriously (a nanometer is 1/1,000,000th of a millimeter), then wafers and masks, which are seriously hold-in-two-hands-big, have to be aligned with a precision that is better than the feature size. But, how do you know you’ve done it right?

The obvious answer is whether or not the chip works. But it would be nice to image the circuit so that it can be compared to the design. Apart from detecting problems during manufacturing, being able to image the final product would also allow for the design to be improved, since it would let you identify areas of a chip that consistently cause problems. But, how do you image structures that might be as small as 14nm that are buried under other structures that you also want to image.