{"id":443389,"date":"2018-06-09T08:00:00","date_gmt":"2018-06-09T12:00:00","guid":{"rendered":"http:\/\/www.prime-wow.com\/?p=443389"},"modified":"2018-06-09T08:00:00","modified_gmt":"2018-06-09T12:00:00","slug":"we-found-a-prototype-4-tb-intel-qlc-ssd-with-500-p-e-cycles","status":"publish","type":"post","link":"https:\/\/www.prime-wow.com\/?p=443389","title":{"rendered":"We Found a Prototype 4 TB Intel QLC SSD with 500 P\/E Cycles"},"content":{"rendered":"<p>The storage industry is getting exciting again. In order to increase capacity of NAND SSDs and lower costs, there are two different routes being taken: either increase the number of bits per cell from 3bpc (TLC) to 4bpc (QLC) for a 33% increase, or increase the number of TLC layers per chip from 64 layers to 96 layers for a 50% increase. Each method has benefits and issues, however we have been waiting for the two technologies to actually be found on upcoming drives (rather than just on a press release). As part of the show we found a 4 TB SATA-based drive using a Maxio Technology controller and Intel&#8217;s latest QLC NAND flash, as well as a drive each from Maxio and SMI using Micron&#8217;s latest 96-layer TLC memory. We also scored some data on the speeds, as well as the state of play of each of the technologies, including the current P\/E cycles of the QLC.<\/p>\n<p align=\"center\"><a href=\"http:\/\/dynamic1.anandtech.com\/www\/delivery\/ck.php?n=a1f2f01f&amp;cb=121204952\" target=\"_blank\"><img decoding=\"async\" src=\"\" border=\"0\" alt=\"\" \/><\/a><img loading=\"lazy\" decoding=\"async\" src=\"\" height=\"1\" width=\"1\" border=\"0\" alt=\"\" \/><\/p>\n<p>&#013;<br \/>\n&#013;<br \/>\nSource: AnandTech &#8211; <a href=\"https:\/\/www.anandtech.com\/show\/12944\/next-gen-storage-we-found-a-prototype-4-tb-intel-qlc-ssd-500-cycles\" target=\"_blank\">We Found a Prototype 4 TB Intel QLC SSD with 500 P\/E Cycles<\/a><\/p>\n","protected":false},"excerpt":{"rendered":"<p>The storage industry is getting exciting again. In order to increase capacity of NAND SSDs and lower costs, there are two different routes being taken: either increase the number of bits per cell from 3bpc (TLC) to 4bpc (QLC) for &hellip; <a href=\"https:\/\/www.prime-wow.com\/?p=443389\">Continue reading <span class=\"meta-nav\">&rarr;<\/span><\/a><\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"ngg_post_thumbnail":0,"footnotes":""},"categories":[93,110],"tags":[94],"class_list":["post-443389","post","type-post","status-publish","format-standard","hentry","category-anandtech","category-unfiltered-rss","tag-anandtech"],"_links":{"self":[{"href":"https:\/\/www.prime-wow.com\/index.php?rest_route=\/wp\/v2\/posts\/443389","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.prime-wow.com\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.prime-wow.com\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.prime-wow.com\/index.php?rest_route=\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/www.prime-wow.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=443389"}],"version-history":[{"count":0,"href":"https:\/\/www.prime-wow.com\/index.php?rest_route=\/wp\/v2\/posts\/443389\/revisions"}],"wp:attachment":[{"href":"https:\/\/www.prime-wow.com\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=443389"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.prime-wow.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=443389"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.prime-wow.com\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=443389"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}